An embedded system is a computer system designed to perform one or a few dedicated functions, often with real-time computing constraints. It is embedded as part of a complete device. For debugging in an embedded system that holds distributed Processing Elements (PE) it is desired to get high visibility of internal data flows to analyze and debug decision points. For example, such a system is typical for streaming data processing such as streaming media processing, e.g. streaming video or audio. For example, communication accelerators with PCD (Parse, Classify and Distribute) steps carried out on the stream of packets may serve as an example for a system for streaming data processing. However, debugging a system having distributed processing elements is difficult due to for example the need for observing complex debug conditions in each PE and at the same time tracking propagation of conditions between different PE and may lead to either huge amounts of debug trace data or incomplete data.
A PE may be any device or circuit configured for data processing, for example any type of processor, such as a central processing unit (CPU), a graphics processor unit (GPU), any general purpose processor, a microcontroller unit (MCU), any multi core networking device, multi core processor, a processor core or a functional area on a processor or other semiconductor device, as well as a data parser, or any type of decoder or encoder circuit, just to name a few.
U.S. Pat. No. 5,642,478 shows a dedicated debugging facility for tracing hardware and software faults in a distributed digital system. Each processing node contains an event data capture circuit and each capture circuit is associated with a corresponding local trace data memory. In this local history buffer system the trace data is continuously accumulated in each PE local memory in order to provide history debug data in case of a system fault, therefore allowing for a post processing procedure. The association of distributed trace data between PE is achieved by timestamp sorting during software analysis.
U.S. Pat. No. 7,200,776 B2 shows a system for generating trace data in a computing system. The trace data is stored without direct association of trace data to data units in a common place defined at configuration by a single, not distributed, debug trace entity.
U.S. Pat. No. 6,134,676 shows a programmable hardware event monitoring method. It describes an on chip logic analyzer function that selects predefined hardware events that have been predefined at design stage and can be used as part of an equation to trigger a debug trace.